cobo_clocking
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cobo_clocking [2014/05/22 09:30] – [Synchronization] abunimeh | cobo_clocking [2014/05/23 14:18] (current) – [CKR and CKW] abunimeh | ||
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===== CKR and CKW ===== | ===== CKR and CKW ===== | ||
- | CKR and CKW are AGET chip Read and Write clocks. These clocks are passed from LMK04803B to an LVDS buffer on CoBo and sent over VHDCI cables to Asads. We have tested the communication with a 10 meter VHDCI cable with CKW running at 100MHz. The table below lists the trace lengths on the PCB. AS* are the signals from the LMK04803B to the LVDS buffer, CK* (shorter traces) are the signals from the LVDS buffer to the VHDCI connector. | + | CKR and CKW are AGET chip Read and Write clocks. These clocks are passed from LMK04803B to an LVDS buffer on CoBo and sent over VHDCI cables to Asads. We have tested the communication with a 10 meter VHDCI cable with CKW running at 100MHz |
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cobo_clocking.1400765423.txt.gz · Last modified: 2014/05/22 09:30 by abunimeh